AMD’s Venice-X maxes out family at 5.3 GHz, returning 3D V-Cache to data center after four years
AMD is reintroducing its 3D V-Cache technology to the data center market after a four-year absence with the upcoming Venice-X processor family, featuring a maximum boost clock of 5.3 GHz.
The chipmaker skipped deploying Turin-X CPUs with 3D V-Cache technology in the previous generation, creating a four-year gap since the technology was last seen in the data center with Genoa-X in 2023. Venice-X will mark the return of this stacked SRAM technology specifically for high-performance computing (HPC) workloads.
Performance boost
While Venice-X matches the 96 cores and 1,152 MB of L3 cache available on the EPYC 9684X (Genoa-X), its key advantage lies in significantly higher clock speeds, with the top model reaching 5.3 GHz. This represents a substantial improvement over previous generations.
The processor also introduces PCIe 6.0 support and delivers nearly four times the per-socket memory bandwidth compared to previous models, reaching 1.6 TB/s. These enhancements make Venice-X particularly well-suited for demanding HPC applications.
Technology evolution
AMD first introduced hybrid bonding to EPYC processors with Milan-X in 2022, followed by Genoa-X a year later. Despite Turin's release, no chip with stacked SRAM appeared until now. Venice-X represents the next evolution, focusing on clock speed improvements rather than core count increases.
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