Intel’s EMIB-T takes aim at TSMC’s CoWoS-L as AI chip packaging gets crowded

Intel is not trying to out-manufacture TSMC at the chip level. Instead, the company is targeting the packaging that holds advanced AI chips together, a critical bottleneck in the current hardware boom.

Intel’s EMIB-T technology replaces the large silicon interposer used in TSMC’s CoWoS-L with small, localized silicon bridges embedded in an organic substrate. The “T” adds through-silicon vias (TSVs), which provide a more direct electrical path for power and signals.

Intel’s Foundry Packaging Director Kyu-oh Lee presented the efficiency case at the ISMP 2026 event in Busan on November 4, 2026. He stated that EMIB achieves wafer utilization above 90%, compared with roughly 60% for conventional interposer designs.

The company expects future AI packages to carry more than 32 HBM stacks and over 70 EMIB bridges. Intel projects AI packages reaching 240 × 240 mm, with the technology slated to enter production in 2026 and support packages extending beyond 8-9x reticle size.

Yield gap and substrate challenges

Intel claims EMIB-T is approaching 90% yield, but the weak spot remains the organic substrate where the bridges sit. TSMC’s CoWoS yields are reportedly near 98%, an eight-point gap that is significant when each package holds some of the most expensive silicon on the planet.

A substrate defect that scrapes an entire assembly is costly, especially for packages with dozens of HBM stacks. The reported yield difference between roughly 90% and near 98% is a key factor for buyers evaluating the technology.

Supply constraints drive interest

The primary driver for this competition is supply. TSMC’s CoWoS capacity, particularly CoWoS-L, is fully booked, forcing customers to look for alternatives.

This has sharpened interest in EMIB-T as a lower-cost option. Google, Amazon, and MediaTek have been named as potential adopters, with Google and Amazon described as exploring the technology for future AI chip designs.

For Intel, packaging may be the most realistic foothold in a market where TSMC has dominated leading-edge manufacturing. Customers do not necessarily need Intel to fabricate their chips to use Intel’s packaging, which lowers the barrier to giving it a try.

What to watch next

Key factors to monitor include whether EMIB-T hits its 2026 production timeline, whether substrate yields close the distance with TSMC, and whether Google, Amazon, or MediaTek move from evaluation to committed volume.

Equally telling will be how far TSMC pushes its own bridge-based work before 2028. The company plans to keep CoWoS-L as its mainstream solution through 2028, while also scaling the technology and exploring its own bridge-based designs.